DocumentCode :
3748206
Title :
Ge nFET with high electron mobility and superior PBTI reliability enabled by monolayer-Si surface passivation and La-induced interface dipole formation
Author :
H. Arimura;S. Sioncke;D. Cott;J. Mitard;T. Conard;W. Vanherle;R. Loo;P. Favia;H. Bender;J. Meersschaut;L. Witters;H. Mertens;J. Franco;L.-A. Ragnarsson;G. Pourtois;M. Heyns;A. Mocuta;N. Collaert;A.V.-Y. Thean
Author_Institution :
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
fYear :
2015
Abstract :
Monolayer-Si-passivated Ge nFETs with high electron mobility (175 cm2/Vs at Ns=5×1012 cm-2) and superior PBTI reliability (max. Vov = |Vg-Vth| of 0.28V at 125°C) at 0.95-nm-EOT are demonstrated on a 300 mm Si wafer platform. The electron mobility is increased by optimizing the Si thickness while significant improvement in PBTI reliability is realized by band engineering using La-induced interface dipole and defect passivation using laser annealing. This is a significant step forward for the introduction of Ge nFET as high mobility device in advanced technology nodes.
Keywords :
"Silicon","Logic gates","Reliability","Electron mobility","Hafnium compounds","Passivation","Annealing"
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2015 IEEE International
Electronic_ISBN :
2156-017X
Type :
conf
DOI :
10.1109/IEDM.2015.7409752
Filename :
7409752
Link To Document :
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