Nanoscale MOSFET modeling for low-power RF design using the inversion coefficient

This paper discusses the concept of the inversion coefficient IC as an essential design parameter that spans the entire range of operating points, from weak, via moderate, to strong inversion. Several figures-of-merit (FoMs) including the Gm/ID, the Ft and their product Gm/ID · Ft are presented and modelled in terms of IC, including the effect of velocity saturation. These FoMs incorporate the various trade-offs encountered in analog and RF circuit design. The simplicity of the IC-based analytical models is emphasized by their favorable comparison against measurements of commercial 40- and 28-nm bulk CMOS processes, as well as with simulations using the BSIM6 model.