DocumentCode :
3749525
Title :
A fully integrated single-chip 35GHz FMCW radar transceiver with high bandwidth in 65nm CMOS process
Author :
Chen Zhao;Yuan Chen;Xinyi Sheng;Bowen Ding;Shengyue Yuan;Tong Tian
Author_Institution :
Key Laboratory of Wireless Sensor Network & Communication, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China
Volume :
1
fYear :
2015
Firstpage :
1
Lastpage :
3
Abstract :
A fully integrated 35GHz linearly Frequency Modulated Continuous Wave (FMCW) single-chip radar transceiver is successfully implemented in 65nm standard CMOS process. The single-chip transceiver is configured in one transmitter and two receivers and includes a wideband process-oriented optimized QVCO, a mm-Wave power amplifier, low noise amplifiers, low noise passive mixers, IF amplifiers as well as control blocks and power management blocks. The one-transmitter-two-receiver configuration will help the radar provide additional functions such as direction angle detecting, positioning and so on. Specially developed design and modeling technologies are involved to promote the linearity and phase noise level of the transmitting link and noise performance of the receiving links. Furthermore, the chip is designed in modularity and presents possibilities with chips to compose MIMO, Phase Array system or other specific detecting system. The presented single chip radar transceiver is able to provide 10dBm output power with 1.5GHz frequency sweep range, 12dB single side band noise figure and draw 170mA current from 1.2V supply.
Keywords :
"Transceivers","Mixers","Radar","CMOS integrated circuits","Power amplifiers","Receivers","Noise figure"
Publisher :
ieee
Conference_Titel :
Microwave Conference (APMC), 2015 Asia-Pacific
Print_ISBN :
978-1-4799-8765-8
Type :
conf
DOI :
10.1109/APMC.2015.7411588
Filename :
7411588
Link To Document :
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