Updates on Ge and SiGe CMP processes for integration as high mobility channel materials

The introduction of Ge/SiGe as a replacement material for silicon in the channel of advanced CMOS devices is a promising process option to enable the desired performance benefits/power reductions for future technology nodes (<;10nm). Ge/SiGe CMP is an essential process step for the realization of the integration of these high mobility materials on standard Si wafers. Previously we have reported on the initial developments of the Ge/SiGe CMP processes [1] [2] [3]. In this work we will discuss two different options for the Ge/SiGe integration: the Ge channel can be introduced either by using the replacement fin approach or by the use of strain relaxed buffer layers. Furthermore we provide further updates for the related CMP processes, such as the selectivity of the Ge/SiGe CMP process to other materials than oxide, the possible use of advanced endpoint control (based on white light) for these materials and some initial defect characterization of relevant defects.