Design and implementation computing unit for laser jamming system using spatial parallelism on FPGA

When a system completes processing a number of functions in a given amount of time, the condition that drives it to do so is called a real-time system. The processing platforms of projective missile system face two major problems: structure complexity and high cost. The complexity in the system structure is a result for multi reasons such as the mechanism used within the system to perform the system functionality and this can cause delay in the data processing which occurs because of various factors, including the architecture of the processing unit, the way the signals in the system modules are synchronized, and the computational power of the unit. In order to reduce the system complexity as well as the system cost, we proposed in this paper applying the spatial parallelism mechanism and a concurrent structure over our embedded system. We used the FPGA platform (NEEK board) to be the implementation environment for this system which resulted in enriching our proposed system with core features such as the low cost as well as decreasing the system complexity since the concurrent structure is used within this system. The spatial parallelism can provide the ability for duplicating the tasks which can be processed via specific modules. We covered in this system signals ranging from 1 Hz to 200 MHz. To avoid the limitation of the master clock of the Nios II Embedded Evaluation Kit, we manipulate the Phase Locked Loop to enable the system from covering wide spectrum of signals. Our laser projective frequency jamming system has the ability to process multiple frequencies per time. The implementation has achieved acceptable throughput and lower complexity (small size (2604)) logic elements in terms of FPGA resource usage and high operating frequency (200 MHz). In addition, the structural design methodology also allows scalability of the embedded concurrent computing architecture as the entire system grows.