DocumentCode :
3750194
Title :
Component embedding platform for thin profile SiP, POP and fan-out WLP
Author :
Risto Tuominen;Arun Gowda;Paul McConnelee
Author_Institution :
Kantan Oy & GE Consultant
fYear :
2015
Firstpage :
1
Lastpage :
6
Abstract :
While component embedding technologies have reached maturity and are used for high volume manufacturing, the industry is looking for new ways to exploit the possibilities it enables. Growing interest in embedding is introducing new challenges, requiring further innovation and pushing development of solutions that offer cost efficient and robust manufacturing processes for novel product designs. High quality and high yield production processes are essential for all embedding technologies, but it is equally important to have a flexible supply solution, which lowers the barrier for adoption and enables short cycle time from early product concept to prototyping and manufacturing. The Power Overlay (POL) technology has been developed to improve product performance and miniaturization using a direct microvia and polyimide (PI) based interconnection technology. The POL is a platform of packaging technology solutions for wide application area. Different POL adaptations and target applications will be briefly reviewed in this paper. A new Ultra-Thin WLPOL process has been developed and will be presented in the paper. The technology feasibility for sub 200μm fan-out WLP package has been demonstrated using 6×6mm, 90×9mm, 10×10mm, and 12×12mm package configurations.
Keywords :
"Strips","Integrated circuit interconnections","Routing","Standards","Layout"
Publisher :
ieee
Conference_Titel :
Electronics Packaging and Technology Conference (EPTC), 2015 IEEE 17th
Type :
conf
DOI :
10.1109/EPTC.2015.7412298
Filename :
7412298
Link To Document :
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