DocumentCode :
3750209
Title :
2.5D IC fault isolation using the time domain reflectometry analysis
Author :
Shu-Hua Lee;Yu-Hsiang Hsiao;Ping-Feng Yang
Author_Institution :
Product Characterization, Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan, 26 Chin 3rd Rd., Nantze Export Processing Zone, Kaohsiung 811, Taiwan
fYear :
2015
Firstpage :
1
Lastpage :
6
Abstract :
The present paper introduced a non-destructive TDR (Time Domain Reflectomerty Analysis) methodology, an essential E-FA (Electrical Failure Analysis) technique for separating the fault isolation and identifying failure mode of advanced 2.5D IC package. The package consists of TSV and u-bump staked packaging structure. This methodology has been shown to be applicable for allocating the defect within a package. The I/V curve tracing, TDR (Time Domain Reflectometry) and the LIT (Lock-in thermography) as the useful package level and die level non-destructive techniques on fault isolation have been performed to overcome some of the difficulties. In this paper, the methodology and application of TDR and LIT on open and short/leakage failure isolations in 2.5D IC packages have been presented. The analysis procedure and results on both of fault isolations as well physical analyses to further inspection the root cause have also been discussed in detail from some case studies and the conclusion are presented at the end.
Keywords :
"Failure analysis","Substrates","Application specific integrated circuits","Fault diagnosis","Electronics packaging","Correlation"
Publisher :
ieee
Conference_Titel :
Electronics Packaging and Technology Conference (EPTC), 2015 IEEE 17th
Type :
conf
DOI :
10.1109/EPTC.2015.7412313
Filename :
7412313
Link To Document :
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