Sigma-delta modulators with interstage gain scaling

Author

Zheng, Zhongqiang ; Chao, Kwong S.

Author_Institution

American Microsystems Inc, Lower Gwynedd, PA, USA

Volume

1

fYear

2000

fDate

2000

Firstpage

40

Abstract

An interstage gain scaling is introduced for a single-bit sigma-delta modulator to depress quantization error and improve signal-to-noise ratio (SNR). The modulator topology consists of a single-bit sigma-delta modulator as the main stage and a feedback loop stage. Quantization error from the main stage is cancelled at the output of the modulator. At the same time, the quantization error from the quantizer in the feedback loop is not only noise-shaped by second order but also scaled down by a factor of K

Keywords

CMOS integrated circuits; circuit feedback; integrated circuit noise; modulators; sigma-delta modulation; switched capacitor networks; CMOS technology; SC circuits; SNR; feedback loop stage; interstage gain scaling; noise shaping; quantization error reduction; sigma-delta modulator; signal-to-noise ratio; single-bit modulator; Circuit simulation; Circuit topology; Delta-sigma modulation; Feedback loop; MATLAB; Multi-stage noise shaping; Noise cancellation; Noise shaping; Quantization; Signal to noise ratio;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on

Conference_Location

Lansing, MI

Print_ISBN

0-7803-6475-9

Type

conf

DOI

10.1109/MWSCAS.2000.951583

Filename

951583