Title :
REDCI3: redesignability check for digital circuits with incomplete implementation information
Author :
Khalil, Mohammad Athar ; Wey, Chin-Long
Author_Institution :
Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI, USA
Abstract :
Presents a redesign process to reuse engineering effort spent on the old implementation and replace only the obsolete parts for improving maintainability of a target system. The process is comprised of three major steps: (1)feasibility check for recovery, (2) feasibility check for derivation; and (3) re-implementation. To demonstrate the effectiveness of the developed process, experimental results on a number of MCNC benchmark circuits are reported
Keywords :
VLSI; integrated circuit design; logic CAD; logic partitioning; timing; MCNC benchmark circuits; REDCI3; digital circuits; feasibility check; logic rectification; maintainability; redesign process; redesignability check; Analog circuits; Costs; Defense industry; Digital circuits; Electrical equipment industry; Industrial control; Intelligent manufacturing systems; Logic design; Manufacturing industries; Microelectronics;
Conference_Titel :
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location :
Lansing, MI
Print_ISBN :
0-7803-6475-9
DOI :
10.1109/MWSCAS.2000.951612
