Title :
A W-band CMOS low power wideband low noise amplifier with 22 dB gain and 3dB bandwidth of 20 GHz
Author :
Chae Jun Lee;Hae Jin Lee;Joong Geun Lee;Tae Hwang Jang;Chul Soon Park
Author_Institution :
Department of Electrical Engineering, KAIST, 291 Daehak-ro, Yuesong-gu, Daejun 305-701, Korea
Abstract :
This paper presents a W-band low power, wideband low noise amplifier design in 65nm CMOS. Low noise amplifier consists of six-stage to obtain high gain. For a high-data rate communication system, the wideband characteristic is very important. In order to enhance the 3 dB bandwidth, a two-center frequency technique is used. In addition, the amplifier was realized by a conjugate matching technique to achieve low-loss between each stage. The measured results show that the LNA can provide a gain of 22dB with a 3 dB bandwidth of 20 GHz. The LNA consumes 21 mW from a 1 V supply voltage, achieving S11 better than -10 dB for frequencies 67~ over 110 GHz, S22 better than -10 dB for frequencies 69~102 GHz. Furthermore, the LNA achieves minimum noise figure (NF) of 6.8 dB at 81 GHz and NF of 6.8~10.4 dB within a 3 dB gain bandwidth.
Keywords :
"CMOS integrated circuits","Low-noise amplifiers","Gain","Wideband","Noise measurement","Microwave circuits"
Conference_Titel :
Microwave Conference (APMC), 2015 Asia-Pacific
Print_ISBN :
978-1-4799-8765-8
DOI :
10.1109/APMC.2015.7413040