A 14-bit two-segment column-level ADC for remote sensing imaging

This paper proposes a 14-bit two-segment column-level ADC which is applied for remote sensing imaging system. The first segment accomplishes 6-bit coarse conversion by charge redistribution structure while the second segment uses a ramp to obtain the 8-bit fine conversion. Both segments adopt single-slope algorithm and the joint of two segments is well designed to avoid code missing or overlap, so the monotonicity is excellent. Segmentation and pre-judgment of MSB decrease the clock frequency of counter, which reduces the dynamic power dissipation and relieves the requirement of comparator´s speed. A 64×64 demo circuit is designed and fabricated in 0.35μm process. Simulation results reveal the average power of single column-level ADC is 160μW and SNR is 81.68dB.