Title :
A 6-GHz integer frequency synthesizer for SATA III applications in 0.18-μm CMOS technology
Author :
Jen-Hao Cheng;Jian-An Lin;Ming-Hang Wu;Jeng-Han Tsai;Tian-Wei Huang
Author_Institution :
Dept. of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, 10617, R.O.C.
Abstract :
In this paper, a 6-GHz frequency synthesize (FS) for SATA III application by using 0.18-μm CMOS technology is presented. Multi-modulus divider (MMD) is utilized to achieve the function of spreading spectrum of SATA III. The complementary voltage-controlled oscillator (VCO) is adopted for phase noise consideration. In order to reduce the locking time of spreading spectrum, the loop bandwidth is increased as large as possible. Based on the aforementioned techniques, the measured free-running phase noise and closed-loop phase noise of the proposed FS are -112 dBc/Hz and -80 dBc/Hz at 1-MHz offset frequency, respectively. The total dc power consumption is 25.2 mW.
Keywords :
"Voltage-controlled oscillators","Phase noise","Power demand","CMOS integrated circuits","Frequency measurement","Clocks","Phase locked loops"
Conference_Titel :
Microwave Conference (APMC), 2015 Asia-Pacific
Print_ISBN :
978-1-4799-8765-8
DOI :
10.1109/APMC.2015.7413482