DocumentCode :
3752289
Title :
Performance trade-off for the Insulated Gate Bipolar Transistor: Buffer layer versus base lifetime reduction
Author :
Allen R. Hefner;David L. Blackburn
Author_Institution :
Electrical Engineering Department, University of Maryland, College Park, 20742, United States
fYear :
1986
fDate :
6/1/1986 12:00:00 AM
Firstpage :
27
Lastpage :
38
Abstract :
A one-dimensional analytic model for the Insulated Gate Bipolar Transistor (IGBT) which includes a high-doped buffer layer in the low-doped bipolar transistor base is developed. The model is used to perform a theoretical trade-off study between IGBTs with and without the buffer layer. The study is performed for devices of equal breakdown voltages, and the critical parameters chosen to “trade-off” are turn-off switching energy loss (related to turn-off time) and on-state voltage, both at a given current. In this study, as in reality, the two critical parameters are varied by: 1) adjusting the doping concentration and thickness of a buffer layer included as part of the bipolar transistor base, 2) adjusting the lifetime in the lowly doped bipolar transistor base with no buffer layer included, or by 3) a combination of 1) and 2). The results of the model predict that for equal breakdown voltages, an optimized device with a buffer layer has less switching energy loss for a given on-state voltage than an optimized device with no buffer layer.
Keywords :
"Charge carrier processes","MOSFET","Cathodes","Epitaxial growth","Substrates","Insulated gate bipolar transistors","Junctions"
Publisher :
ieee
Conference_Titel :
Power Electronics Specialists Conference, 1986 17th Annual IEEE
ISSN :
0275-9306
Print_ISBN :
978-9-9963-2327-0
Type :
conf
DOI :
10.1109/PESC.1986.7415543
Filename :
7415543
Link To Document :
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