• DocumentCode
    3752561
  • Title

    8-bit 22nW SAR ADC using output offset cancellation technique

  • Author

    Karim M. Abozeid;Mohamed M. Aboudina;A.H. Khalil

  • Author_Institution
    Faculty of Engineering, The British University in Egypt (BUE), El Sherouk City, 11837 Cairo, Egypt
  • fYear
    2015
  • Firstpage
    76
  • Lastpage
    79
  • Abstract
    In this paper we present an offset cancellation technique for a comparator used in SAR (successive approximation register) analog to digital converter improving the signal to noise ratio of the whole system with minimum power consumption at the expense of complexity of the system. An 8-bit SAR ADC is presented with power consumption 22nW, ENOB = 7.051 and SNR = 47.11 dB. All simulations are done under clock frequency = 100 kHz and a supply voltage 1V.
  • Keywords
    "Switches","Capacitors","Signal to noise ratio"
  • Publisher
    ieee
  • Conference_Titel
    Computer Engineering Conference (ICENCO), 2015 11th International
  • Type

    conf

  • DOI
    10.1109/ICENCO.2015.7416328
  • Filename
    7416328
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3752561