Generic scrubbing-based architecture for custom error correction algorithms

Scrubbing has been considered as an efficient mechanism to repair faults in the FPGA´s configuration memory, when they are placed in harsh environments. By using this elementary mechanism, several academic solutions/algorithms based on error correction codes (ECCs) have been proposed. However, most of these proposed solutions are only theoretical and do not properly deal with the implementation concerns. With this paper we propose a generic scrubbing-based hardware architecture and design flow for implementing custom error correction algorithms based on ECCs. A conducted case study implementing and evaluating three different algorithms shows the feasibility and the efficiency of the proposed architecture and design flow.