DocumentCode
375489
Title
An analysis of flash dynamic element matching analog to digital converters
Author
Stubberud, Peter ; Bruce, J.W.
Author_Institution
Dept. of Comput. Sci. & Electr. Eng., Nevada Univ., Las Vegas, NV, USA
Volume
2
fYear
2000
fDate
2000
Firstpage
684
Abstract
In this paper, a flash dynamic element matching (DEM) analog to digital converter (ADC) architecture is analyzed, and criteria are developed for comparing this architecture´s performance when various DEM algorithms are applied to it. As an example, these performance criteria are used to compare four DEM algorithms applied to a 6 bit flash DEM ADC
Keywords
analogue-digital conversion; 6 bit; DEM algorithm; analog-to-digital converter; flash dynamic element matching architecture; Analog-digital conversion; Computer architecture; Data conversion; Degradation; Frequency; Heuristic algorithms; Integrated circuit interconnections; Nonlinear distortion; Performance analysis; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location
Lansing, MI
Print_ISBN
0-7803-6475-9
Type
conf
DOI
10.1109/MWSCAS.2000.952849
Filename
952849
Link To Document