DocumentCode
375506
Title
An adjustable CMOS load line for nonlinear circuits
Author
He, Xinhua ; El-Leithy, Nevine ; Sellami, Louiza ; Newcomb, Robert W.
Author_Institution
Dept. of Electr. & Comput. Eng., Maryland Univ., College Park, MD, USA
Volume
2
fYear
2000
fDate
2000
Firstpage
784
Abstract
A five transistor nonlinear load line is presented for use in analog CMOS circuit design. The load line can be adjusted, possibly dynamically, by an external voltage to fit the situation. In this paper the load-line circuit is presented along with design equations and an example of its use in the realization of a neural type cell. Other uses are in relaxation oscillator and chaos generator design
Keywords
CMOS analogue integrated circuits; chaos generators; integrated circuit design; neural chips; nonlinear network synthesis; relaxation oscillators; CMOS analog circuit design; chaos generator; external voltage; neural type cell; nonlinear load line; relaxation oscillator; Analog circuits; Diodes; Educational institutions; Equations; Helium; Laboratories; MOSFETs; Nonlinear circuits; Oscillators; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location
Lansing, MI
Print_ISBN
0-7803-6475-9
Type
conf
DOI
10.1109/MWSCAS.2000.952873
Filename
952873
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