Title :
Design techniques for high-speed sigma-delta modulators
Author :
Ndjountche, Tertulien ; Unbehauen, Rolf
Author_Institution :
Lehrstuhl fur Allgemeine und Theor. Elektrotech., Erlangen-Nurnberg Univ., Erlangen, Germany
Abstract :
As the minimum feature size of VLSI technologies scales down, more of the signal processing tasks are performed in the digital domain, making the analog-to-digital converter (ADC) design critical. High speed designs can be achieved by using oversampling ADC structures based on a continuous-time filter or an array of converters interconnected in parallel. At high sampling rates, the resolution appears to be limited by the different noise sources. Attributes of high performance ADCs are described and techniques to improve the ADC performance are presented
Keywords :
calibration; high-speed integrated circuits; integrated circuit design; integrated circuit noise; sampling methods; sigma-delta modulation; timing jitter; ADC; VLSI; analog-to-digital converter; array of converters; continuous-time filter; digital calibration; digital domain; high speed designs; minimum feature size; noise sources; oversampling structures; sampling rates; signal processing; timing jitter; Clocks; Delay; Delta-sigma modulation; Filters; Sampling methods; Signal design; Signal processing; Signal resolution; Signal sampling; Timing jitter;
Conference_Titel :
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location :
Lansing, MI
Print_ISBN :
0-7803-6475-9
DOI :
10.1109/MWSCAS.2000.952903
