• DocumentCode
    375534
  • Title

    Iterated calculation of global implications and recursive learning in combinational equivalence checking

  • Author

    Reda, Sherief ; Wahba, Ayman ; Salem, Ashraf ; Ghonaimy, Mohamed A.

  • Author_Institution
    Comput. & Syst. Eng. Dept., Ain Shams Univ., Cairo, Egypt
  • Volume
    2
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    976
  • Abstract
    Boolean satisfiability and recursive learning have been used in solving the combinational equivalence-checking problem. In this paper, we extend the recursive learning procedure and integrate it with global implications calculated in an iterative way to reduce the time needed for the solution. We also propose a variable ordering scheme to minimize the number of iterations needed to calculate the implications
  • Keywords
    Boolean functions; automatic test pattern generation; combinational circuits; iterative methods; logic testing; ATPG technique; Boolean satisfiability; ISCAS-85 benchmark circuits; TEGUS; combinational equivalence checking; global implications; iterated calculation; recursive learning; variable ordering scheme; Automatic test pattern generation; Boolean functions; Circuit analysis; Circuit faults; Combinational circuits; Data structures; Decision trees; Performance analysis; Systems engineering and theory; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
  • Conference_Location
    Lansing, MI
  • Print_ISBN
    0-7803-6475-9
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2000.952917
  • Filename
    952917