Analysis and hardware-in-the-loop simulation of a pole-to-pole DC fault in MMC-based HVDC systems

This paper analyzes the possible range of the DC currents developed by a pole-to-pole DC fault in a Modular Multilevel Converter (MMC) -based high voltage direct current (HVDC) system, using half-bridge submodules (SM), when the actual control and protection (C&P) scheme for the system recently installed in China is applied. The results derived from differential equations are validated by hardware-in-the-loop (HIL) simulation with the complete C&P equipment. Unlike an AC fault at the grid side, which may be tested on a physical test bench or even on the actual system, a pole-to-pole DC fault is so severe that it can be only studied with a real-time digital simulator (RTS), if the dynamic response of the actual C&P system is involved.