Title :
A Test Generation Method for Data Paths Using Easily Testable Functional Time Expansion Models and Controller Augmentation
Author :
Tetsuya Masuda;Jun Nishimaki;Toshinori Hosokawa;Hideo Fujiwara
Author_Institution :
Grad. Sch. of Ind. Technol., Nihon Univ., Chiba, Japan
Abstract :
In recent years, various high-level test synthesis methods for data paths have been proposed for the improvement in design productivity and test cost reduction. Most of the approaches assume that controllers and data paths are isolated from each other, and hence the hardware overhead becomes large. On the other hand, the approach without separation of a controller and a data path usually decreases the testability. To resolve this problem, an approach that augments a controller by adding extra control functions to make a data path easily testable was proposed. However, the approach cannot always succeed in generating test sequences with high fault coverage if a general ATPG tool is used without knowing any information of augmented control functions. In this paper, we introduce "easily testable functional time expansion models for data paths", and propose a test generation method for data paths using easily testable functional time expansion models and controller augmentation such that easily testable functional time expansion models are controllable. Experimental results show the effectiveness of the proposed method for high level synthesis benchmark circuits.
Keywords :
"Data models","Registers","Hardware","Integrated circuit modeling","Testing","Circuit faults","Algorithm design and analysis"
Conference_Titel :
Test Symposium (ATS), 2015 IEEE 24th Asian
Electronic_ISBN :
2377-5386
DOI :
10.1109/ATS.2015.14