A digital PET system based on SiPMs and FPGA-only MVT digitizers

As digital signal has abilities like immunity for transmit distortion and feasibility to calibrate, digital architecture that samples the event waveform at the earliest possible stage shows promising potential for building next generation PET system. Multi-voltage threshold (MVT) is a digital sampling method that take time samples when pulses cross predefined thresholds and extracts event information by analyzing the resulting samples. Previously we have prototyped an FPGA-only implementation of the MVT digitizer and developed a PET detector module using the FPGA-only MVT digitizer. In this work, we report our development of a 36-channel FPGA-only MVT digitizer and a fully-functional demonstrator system based on using such digitizers in combination with SiPMs-based PET detector blocks which consists of a 6×6 LYSO matrix and a 6×6 SiPM array with 1×1 coupling, yielding a total of 36 output signals. The demonstrator system has a ring with 93mm diameter and 25mm axial length which consists of 12 PET detector modules. Our initial measurements show an energy and coincidence timing resolution of 16.6% at 511 keV and 668 ps (FWHM), respectively. We have also successfully imaged an image-quality phantom and the initial result indicates the system can support a spatial resolution of ~2 mm.