A 72-channel FPGA-only MVT digitizer board and a micro-system for coincidence detection/imaging

Based on the multi-voltage threshold (MVT) method, we have proposed the FPGA-only implementation for positron emission tomography (PET) detectors. It realizes required comparators and time-to-digital convertors (TDCs) on FPGAs. Thus, its performance can be easily enhanced by optimizing the inside algorithm without hardware modifications or improved with the development of FPGA technologies. In this paper, we leverage the advantages of the FPGA-only implementation to develop a new digitizer board that can provide 72 digitizing channels. This digitizer board significantly increases its readout density than before. And the power consumption is also reduced from 330 mW per channel to 150 mW per channel. By connecting the board to a pair of 6 × 6 LYSO/SiPM arrays, a micro-system, useful for coincidence detection and imaging small objects, is built. We also introduce a TDC multiplexing method when implementing MVT digitizers which apparently reduces the required FPGA resources by 70%. These freed resources can be reused to further improve the integration of readout system. With the micro-system, our preliminary results indicate a coincidence timing resolution of ~530 ps (FWHM) and an energy resolution of ~15% (at 511 keV) when the signal rate is 0.9 Mcps, regardless whether TDC multiplexing method is used.