A low-distortion delta-sigma modulator with ring amplifier and passive adder embedded SAR quantizer

This paper presents a novel multi-bit feedforward ΔΣAD modulator for low power and high signal-to-noise-and-distortion (SNDR) application. The integrators in the modulator are realized by ring amplifiers without static current. Multi-bit quantizer and analog adder in the feedforward modulator is realized by a passive-adder embedded successive approximation register (SAR) ADC which consists of capacitor array and a comparator. The dynamic comparator does not dissipate static power at all when a pre-amplifier is not used. Proposed modulator is designed in TSMC 90nm CMOS technology. SPICE simulation results of the modulator show that SNDR=85.36 dB is reached for -1dBFS input while OSR=64. And the total analog power consumption of the modulator is 1.21mW at 1.2V power supply.