Design and Implementation of Quadruple Floating-Point CORDIC

Since decades, CORDIC (Coordinate Rotational Digital Computer) has been drawing attention as an arithmetic unit in the field of signal and image processing, communication system and robotics due to its low hardware complexity to compute linear, trigonometric and transcendental functions. Because of increased demand of high dynamic range in the aforesaid application, the floating point CORDIC is an obvious choice instead of fixed point arithmetic. To the knowledge of authors, only up to double precision CORDIC´s are reported in literatures which are limited to a dynamic range of 2-1023 to 21024 and have accuracy up to 13 decimal digits, but these existing CORDIC are also not enough to support the high dynamic range of values to be computed for aforesaid functions. Hence, authors in this paper have proposed a new quadruple floating point CORDIC architecture which have dynamic range of 2-16383 to 216384 and are accurate up to 22 decimal digit. This architecture could meet the demand of present and future dynamic range. This proposed design is coded and simulated using Verilog HDL and synthesized using XST tool, targeting a commercially available FPGA device XCVLX110T-IFF1136. Further, the hardware utilization with its timing and power performance are reported in this paper.