DocumentCode
3761770
Title
Minimization of combinational digital circuit using genetic algorithm
Author
Peeyush Sharma;Trailokya Nath Sasamal
Author_Institution
Department of Electronics and Communication, National Institute of Technology, Kurukshetra, India
fYear
2015
Firstpage
1
Lastpage
4
Abstract
Evolutionary Algorithm (EA) methods are proved more effective for solving complex digital circuit design problems and evaluating the fitness of combinational circuits. They optimize circuits in terms of less number of gates and transistors. In the proposed method, we have calculated the best fitness of the circuit from the designed algorithm by adjusting the parameters of Genetic Algorithm (GA) like mutation rate, crossover rate and number of generations. Then the least fitness, average fitness and worst fitness of the algorithm are evaluated. The digital gates fitness approaches to its maximum for different input parameters in different number of generations. In this method we have defined fitness function which is giving digital gate fitness in less number of generations and also optimizing the total number of gates. Experimental results are showing that proposed EA optimized the digital circuit with less number of gates and maximum fitness is evolved with less number of generations.
Keywords
"Logic gates","Biological cells","Genetic algorithms","Digital circuits","Combinational circuits","Optimization","Sociology"
Publisher
ieee
Conference_Titel
Computational Intelligence and Computing Research (ICCIC), 2015 IEEE International Conference on
Print_ISBN
978-1-4799-7848-9
Type
conf
DOI
10.1109/ICCIC.2015.7435820
Filename
7435820
Link To Document