DocumentCode :
3762624
Title :
Novel device architectures and carbon based materials for future nanoelectronics
Author :
Razali Ismail
Author_Institution :
Cambridge University, U.K.
fYear :
2015
Firstpage :
1
Lastpage :
1
Abstract :
The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) constitutes the backbone of today´s microelectronics industry. MOSFETs are the building blocks of very-large-scale-integrated (VLSI) circuits in microprocessors, memory chips and telecommunications microcircuits. A modern microprocessor can contain more than 2 billion MOSFETs. MOSFETs are mainly used as switches in logic microcircuits. To a large extent, the success of modern microelectronics is based on the continuous miniaturization or scaling of silicon MOSFET, which makes them smaller, faster, and cheaper. Over the past few decades, the miniaturization in silicon integrated circuits (IC´s) has been well characterized and envisioned by Moore´s Law, which predicted that the numbers of transistors on a chip will double every 18 to 24 months. So far, Moore´s Law has been a useful way of describing the progress of ICs and the number of transistors fitted into each generation of processors. However, physical and performance limitations are encountered with the continuous downscaling of the transistor into the nanometer regime which motivates the semiconductor industry to explore alternative device technologies. Novel device architectures and materials are to be investigated in order to continue to increase the speed and scalability of MOSFET devices. This will lead to a new paradigm for future nanoelectronic device design. In conjunction, the International Roadmap of Semiconductor (ITRS) pointed out that one of the primary challenges that the industry has identified is how to decrease the size of semiconductors while increasing the performance standard to meet consumer demands with the hope of maintaining the Moore´s exponential growth. Hence `Beyond Moore´ plan is introduced to identify alternatives to the conventional MOSFET transistor. This plan includes new device designs such as the vertical MOSFET, dual-gate FET and FinFET as an alternative to the existing planar transistor. In addition, it is also related to the use of alternative materials, namely strained silicon, silicon nanowire, carbon nanotube and graphene to replace the active channel region. The research focus primarily on the aspect of modeling and simulation. It develops and applies numerical algorithms to investigate emerging nanoelectronic devices.
Keywords :
"Nanoelectronics","MOSFET","Microprocessors","Information technology","Computers","Electrical engineering"
Publisher :
ieee
Conference_Titel :
Information Technology, Computer, and Electrical Engineering (ICITACEE), 2015 2nd International Conference on
Print_ISBN :
978-1-4799-9861-6
Type :
conf
DOI :
10.1109/ICITACEE.2015.7437758
Filename :
7437758
Link To Document :
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