Core and Back-End enhancements for CUPSHOP HW/SW partitioning tool

Hardware/Software co-design has become one of the main methodologies in modern embedded systems. The HW/SW partitioning problem is a central problem in Hardware/Software co-design. The recently-introduced Cairo University PSo-based Hardware/sOftware Partitioning (CUPSHOP) tool advanced the swarm intelligence optimization techniques to solve this problem. In this paper we introduce an augmented version of the CUPSHOP tool. This augmented CUPSHOP version adds an automatic RTL (VHDL) Back-End generation for the HW mapped components. It also complements the different hardware implementations alternatives already supported by the tool with the pipelined hardware alternative. Furthermore, it implements an improved pre-scheduling delay estimation formula.