• DocumentCode
    3762855
  • Title

    Formal modeling, verification and implementation of a train control system

  • Author

    Mohammad Hossein Askari Hemmat;Otmane Ait Mohamed;Mounir Boukadoum

  • Author_Institution
    Dept. of ECE, Concordia University, Montreal, Canada
  • fYear
    2015
  • Firstpage
    134
  • Lastpage
    137
  • Abstract
    For complex system design, it can be very useful to use abstracted models to verify functionality, thereby reducing the number of potential bugs in the implementation phase. In this respect, model checking is a powerful technique for automatically determining whether a design (model) satisfies desired properties. Upon positive results, the design can then be implemented with limited risks of malfunction. In this paper, we show this by modeling a train control system for safe speed and acceleration limits and verifying the correctness of the model properties using the NuSMV model checker. Then, we implement the algorithm of the verified model on an ARM CortexM platform.
  • Keywords
    "Acceleration","Logic gates","Model checking","Computational modeling","Control systems","Mathematical model"
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics (ICM), 2015 27th International Conference on
  • Electronic_ISBN
    2159-1679
  • Type

    conf

  • DOI
    10.1109/ICM.2015.7438006
  • Filename
    7438006