A novel reversible combinational circuit design for low power computation

With the advancement of nanometer scale design technology, transient faults often occur in circuits and thus require low power dissipation design. Reversible logic has become one of the recent emerging research interests contributing to the field of low power dissipating circuit design in the past few years. Few of its application areas include CMOS low power design, quantum computing, network security, digital signal and image processing, optical electronics and nanotechnology. This paper presents a comparative study of efficacy of various reversible full adder and reversible full subtractor gate and their quantum cost values to obtain energy efficient logic design. A novel design approach for implementing reversible combinational circuits using the existing Reversible logic gates and new improved Reversible logic gates is discussed in this paper. The reversible logic circuits are designed and implemented using Verilog code. The simulation results are obtained in Xilinx ISE version 9.2i.