Title :
Study on design of quantum fourier transform gate emulator
Author :
Norihito Higa;Mitsunaga Kinjo
Author_Institution :
Electrical and Electronics Engineering Course, Graduate School Engineering and Science, University of the Ryukyus, Okinawa, Japan
Abstract :
In this study, we design small-scale circuit as quantum Fourier transform gate emulator which is a part of prime factorization quantum algorithm (Shor´s algorithm), based on previous proposed quantum logic gate emulator with complex probability amplitude.
Keywords :
"Quantum computing","Computers","Fourier transforms","Logic gates","Hardware design languages","Layout","Integrated circuit modeling"
Conference_Titel :
Intelligent Informatics and Biomedical Sciences (ICIIBMS), 2015 International Conference on
DOI :
10.1109/ICIIBMS.2015.7439492
