DocumentCode
3763778
Title
XOR gates for low-energy and near-Vth operation
Author
Azam Beg;Ajmal Beg;Amr Elchouemi
Author_Institution
United Arab Emirates University, Al Ain, UAE
fYear
2015
Firstpage
49
Lastpage
52
Abstract
XOR gates are essential components of many logic circuits. With the aim of reducing energy dissipation, this paper proposes the use of genetic-algorithm-based optimization for XOR gates operating in the near-threshold region. We applied the proposed technique on four different types of XOR gates built using 22 nm devices. The resultant energy savings for the optimized gates ranged from 28% to 48% when compared with the traditionally-sized gates. The areas of the energy-optimized gates are also appreciably less than their conventional counterparts. The presented technique can be readily used for optimizing the gates for power, performance, noise-margin, etc.
Keywords
"Logic gates","Delays","Transistors","Optimization","Current measurement","Reliability","CMOS integrated circuits"
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on
Type
conf
DOI
10.1109/ICECS.2015.7440246
Filename
7440246
Link To Document