DocumentCode :
3763872
Title :
Implementation of multiple PID controllers on FPGA
Author :
Mokhtar Aboelaze;Mohamed Ghazy Shehata
Author_Institution :
Dept. of EECS, Lassonde School of Engineering, York University, Toronto Canada
fYear :
2015
Firstpage :
446
Lastpage :
449
Abstract :
Proportional Integral Control (PID) is one of the most widely used control techniques. Its main advantages are simplicity of design and ease of implementation. Although many other control techniques have been proposed and used, the PID controller is the workhorse of the industry. Usually, PID controllers are implemented on microcontrollers. However, with the increase of the use of FPGA´s and especially when we require a large number of controllers controlling the same plant (although many processes), FPGA´s seem as a very good alternative. One point though, today´s FPGA chips run at a frequency of 50-100 MHz or even more for high-end chips. That is very high frequency than what is required for most PID controllers. Our goal is to utilize the FPGA chip resources to implement multiple PID controllers in the same chip. In this paper, we present a technique to implement multiple PID controllers on the same FPGA chip using the computational resources required by only 1 PID core.
Keywords :
"Process control","Field programmable gate arrays","Hardware","Jitter","Computer architecture","Random access memory","Control systems"
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on
Type :
conf
DOI :
10.1109/ICECS.2015.7440344
Filename :
7440344
Link To Document :
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