DocumentCode :
3763879
Title :
Procedural analog design automation using building block optimization
Author :
Maged El-Sisi;Mohamed Dessouky
Author_Institution :
Mentor Graphics Corporation
fYear :
2015
Firstpage :
474
Lastpage :
477
Abstract :
This paper presents a new environment for characterizing foundry CMOS device models and analog basic blocks. This environment can also be used to design some analog basic building blocks. It designs analog circuits by dividing them into a set of basic building blocks connected together, where each block is optimized separately considering other blocks´ loading and/or boundary conditions. It can run over different technologies using foundry models and simulation measurements without approximations, hand calculations or simplified equations. The efficiency of the complete flow is evaluated through designing a single-ended two-stage operational amplifier over 180nm, 130nm, 90nm, 65nm and 40nm technologies.
Keywords :
"Optimization","Design automation","CMOS integrated circuits","Semiconductor device modeling","Mathematical model","MOS devices","Libraries"
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on
Type :
conf
DOI :
10.1109/ICECS.2015.7440351
Filename :
7440351
Link To Document :
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