DocumentCode
3763905
Title
A scalable synchronous reload technique for wide division range multi modulus dividers
Author
Mohammed El-Shennawy;Mohamed Eissa;Markus Schulz;Niko Joram;Frank Ellinger
Author_Institution
Chair for Circuit Design and Network Theory, Technische Universit?t Dresden 01062, Dresden, Germany
fYear
2015
Firstpage
555
Lastpage
558
Abstract
This work presents a detailed study for the logic of multi modulus frequency dividers (MMDs) with multiple modulus extensions. These MMDs have higher power efficiency compared to conventional pulse swallow dividers. In integer-N phase locked loops (PLLs), these MMDs are fully functional over their entire division range. In fractional-N PLLs however, certain division ratios cause the PLL to lose lock which makes multi-standard designs more challenging. In this work, a generic scheme that mitigates this issue is proposed which according to the best of the authors´ knowledge leads to the simplest truly-continuous wide-division-range MMD for fractional-N PLLs.
Keywords
"Computer architecture","Microprocessors","Phase locked loops","Switches","Frequency conversion","Latches","Logic gates"
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on
Type
conf
DOI
10.1109/ICECS.2015.7440377
Filename
7440377
Link To Document