DocumentCode
3764611
Title
Low voltage bulk-driven CMOS inverter with lower delays
Author
Maneesha Gupta;Bhawna Aggarwal;Priyanka Garg;Parish Aggarwal;Swati Jain
Author_Institution
Delhi University, NSIT, India
fYear
2015
Firstpage
1
Lastpage
5
Abstract
In this paper, a low voltage bulk-driven CMOS inverter capable of operating at power supplies of ±0.9V using standard CMOS technologies is proposed. The proposed inverter gives not only smoother transient response with a lower delay, but also a sharper fall from high to low than its gate-driven counterpart. The proposed bulk-driven inverter is analysed for various regions of operation and simulated results using SPICE in 0.35μm CMOS technology are shown to demonstrate the effectiveness of the circuit.
Keywords
"Inverters","MOSFET","Logic gates","CMOS integrated circuits","Threshold voltage","CMOS technology"
Publisher
ieee
Conference_Titel
India Conference (INDICON), 2015 Annual IEEE
Electronic_ISBN
2325-9418
Type
conf
DOI
10.1109/INDICON.2015.7443309
Filename
7443309
Link To Document