DocumentCode :
3764813
Title :
Comparative analysis of GaN-on-3CSiC and conventional Si MOSFET for digital integrated circuits
Author :
Ashish V. Jawake;Kalyani S. Bhosale;Harshad S. Borse;Subhash R. Patil;Sayli R. Aher;Ganesh C. Patil
Author_Institution :
Department of Electronics and Telecommunication, JSPMs Rajarshi Shahu College of Engineering, Savitribai Phule Pune University, 411033, India
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
Recently, due to its superior properties, silicon carbide (SiC) has attracted the attention of researchers for high power devices. However the reduced electron mobility is the major challenge in SiC for low power devices. In this paper, a novel GaN on SiC MOSFET with partial buried oxide (BOX) has been proposed to use SiC material for low power applications. It has been found that, the use of GaN on partial BOX not only reduces the subthreshold swing (SS), drain induced barrier lowering (DIBL) and off-state leakage (IOFF) but also improves the on-state current (ION) of the device. Further, static power dissipation (PStat) in the case of proposed device is reduced by ~30% over the conventional Si MOSFET. This clearly shows that, the proposed GaN on SiC MOSFET with partial BOX is the most promising device for digital integrated circuits.
Keywords :
"MOSFET","Silicon","Gallium nitride","Silicon carbide","Substrates","Performance evaluation","Logic gates"
Publisher :
ieee
Conference_Titel :
India Conference (INDICON), 2015 Annual IEEE
Electronic_ISBN :
2325-9418
Type :
conf
DOI :
10.1109/INDICON.2015.7443513
Filename :
7443513
Link To Document :
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