A 0.5 V, 80-nW pseudo-differential two-stage OTA in 0.18?m CMOS technology

This paper presents the design of a miller compensated two-stage fully differential pseudo operational transconductance amplifier (OTA) for ultra low-voltage and low-power mixed-signal applications. The circuit was designed using standard 0.18μm digital CMOS process with bulk biasing of PMOS transistor to reduce the threshold voltage(Vth). The OTA operated at a supply voltage of 0.5V and consumes only 80nW of power. The OTA has simulated with a load of 5pF, which gives a DC gain 87.5 dB and a phase margin 62° at unity gain frequency 35 kHz. The proposed OTA figure of merit improved for unity gain frequency and slew-rate as compared to the state of art.