Implementation of optimized QDDFS on FPGA for software defined radio

This paper presents an framework for efficient design and implementation of optimized Quadrature Direct Digital Frequency Synthesizer (QDDFS) for software defined radio (SDR) on FPGA platform. SDR are radios that provide software control of a variety of modulation techniques over a broad frequency range. QDDFS generates the sine and cosine values in digital domain. QDDFS is optimized in terms of the device utilization with fine resolution in terms of phase and frequency. and also to rapidly hop between the different frequencies, thus improving the efficiency of SDR. In modulation, Proposed QDDFS has structure which utilizes less resource on FPGA and in demodulation same architecture is used to retrieve back the digital data. The proposed QDDFS is optimized than the Coordinate Rotation Digital Computer (CORDIC) technique, Look-Up Table based (LUT) QDDFS.