Design of a 3.3V 4.1 GHz Narrowband CMOS differential low noise amplifier

A Narrowband Differential Low Noise Amplifier (DLNA), applicable for Global Positioning System receivers, with center frequency of 4.1GHz and Bandwidth of 90MHz using 180nm rf CMOS process parameters is designed in this paper. Rigorous optimization is carried out for the following parameters-Input and Output Impedance Matching, Gain, Bandwidth, Noise Figure, Power Consumption, 1dB Compression Point, 3rd Order Input Intercept Point and Power-Added Efficiency. The Stability of the design is also verified. The proposed DLNA exhibits a Forward Gain, S21 of 19.9dB. Input and Output Matching Parameters, S11 and S22 are -25.3dB and -12.6dB respectively. The Reverse Isolation Parameter, S12 is -28.2dB and Noise Figure, NF is 2.13dB. The proposed DLNA consumes 29.392mW power while operating with a supply voltage of 3.3V. The 1 dB compression point is -9.28 dBm. The Power-Added Efficiency, PAE of this DLNA is measured to be 6.11%.