• DocumentCode
    37672
  • Title

    Garbage Collection for Low Performance Variation in NAND Flash Storage Systems

  • Author

    Sanghyuk Jung ; Yong Ho Song

  • Author_Institution
    Dept. of Electron. Eng., Hanyang Univ., Seoul, South Korea
  • Volume
    34
  • Issue
    1
  • fYear
    2015
  • fDate
    Jan. 2015
  • Firstpage
    16
  • Lastpage
    28
  • Abstract
    In many NAND flash-memory storage systems, invalidated pages can occupy the storage space until being erased. In order to preserve sustained write performance and effective storage capacity, the flash translation layer (FTL) must recycle these pages through garbage collection (GC) operations. Many previous studies have investigated GC techniques, most of which have focused on the effective selection of victim blocks to reduce the operational overhead. However, methods to reduce the cost overhead of the victim selection process, as well as to improve the responsiveness of storage systems during GC, have not yet been explored. In this paper, therefore, we propose a novel GC mechanism, called link-based GC (LINK-GC), which provides fast victim selection and preemptive operation with small additional space overhead to existing page-mapped FTLs. In our experiments, when compared with a GC scheme based on an on-demand victim search, the proposed mechanism increases the average input-output operations per second (IOPS) by up to 15.8% and decreases the standard deviation of IOPS by up to 6.16 times. Additionally, the LINK-GC shows better performance than the existing preemptive GC techniques in terms of responsiveness to host requests.
  • Keywords
    NAND circuits; flash memories; storage management; FTL; IOPS; LINK-GC; NAND flash-memory storage systems; flash translation layer; garbage collection; input-output operations per second; link-based GC; standard deviation; storage capacity; Algorithm design and analysis; Data structures; Delays; Flash memories; Process control; Random access memory; Recycling; Data storage systems; embedded software; flash memories; memory management; scheduling algorithms;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2014.2369501
  • Filename
    6954423