DocumentCode :
3768160
Title :
Hardware accelerated stereo imaging for visual servoing
Author :
M. Dhipa;N. Jeyakkannan;A. Chandrasekar
Author_Institution :
Electronics and Instrumentation Engineering, SNS College of Technology, Coimbatore, India
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
The core aspect of an automated robotic system relies primarily on the robustness of the processing device. To have a trustworthy autonomous system, features like effective sensing abilities are mandatory. But the degree of speed and accuracy of processing is the most challenging issue in processing using embedded microcontroller chips. With a view to satisfy this demand, this paper presents a novel concept of hardware accelerated image computation in robotics. By parallelizing the process, the speed of operation of stereo imaging could be enhanced. The data and task can be parallelized by using pipelining in FPGAs. /by discretization of image and by opting for stronger detection using stereo imaging, the speed of the automated system can be designed to a larger extend. The insights in this paper will improve the poise of the depth calculation and visual servoing in all robotic system.
Keywords :
"Visual servoing","Field programmable gate arrays","Cameras","Acceleration"
Publisher :
ieee
Conference_Titel :
Green Engineering and Technologies (IC-GET), 2015 Online International Conference on
Type :
conf
DOI :
10.1109/GET.2015.7453786
Filename :
7453786
Link To Document :
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