DocumentCode :
3768234
Title :
7-Transistor 2-memristor based non-volatile static random access memory cell design
Author :
Manish Kumar Pandey;Shashank Kumar Ranu;Prashant Gupta;Aminul Islam
Author_Institution :
Department of Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi, Jharkhand, India
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
Emerging chip technologies employ power-off mode to reduce the power dissipation of chips. Non-volatile SRAM (nvSRAM) enables a chip to store the data after power-off mode. This non-volatility can be achieved through memristor memory technology which is a promising emerging technology with unique properties such as high density, low-power and good-scalability. This paper provides a detailed study of memristor and proposes a memristor based 7T2M nvSRAM cell. This cell incorporates two memristors, which store the bit information present in the 6T SRAM cell, and a 1T switch, which helps to restore the previously written bit in situations of power supply failures, thereby making the SRAM non-volatile.
Keywords :
"Memristors","Nonvolatile memory","Delays","Resistance","SRAM cells","MOSFET circuits"
Publisher :
ieee
Conference_Titel :
Green Engineering and Technologies (IC-GET), 2015 Online International Conference on
Type :
conf
DOI :
10.1109/GET.2015.7453861
Filename :
7453861
Link To Document :
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