A selectorless RRAM with record memory window and nonlinearity based on trap filled limit mechanism

Implementation of a crossbar array of selectorless resistive random access memory (RRAM) devices requires a high nonlinearity (NL) in low resistance state (LRS) currents to avoid the sneak path leakages. In this work, a process dependent nonlinearity in the low resistance state of Pr_0.7Ca_0.3MnO₃ (PCMO) based RRAM devices is studied. We present a device with a record high NL of ~95.5 in LRS currents (Ilrs) along with a memory window (MW) of ~164. We report a very high slope of ~16 mV/dec in the nonlinear region of ILRS. Further, we extract the material parameter like trap level, trap density etc. using previously developed space charge limited current (SCLC) based analytical model.