DocumentCode
3770925
Title
Cellular Automaton-based nanoelectronic hardware
Author
Ferdinand Peper;Takeo Watanabe;Teijiro Isokawa;Nobuyuki Matsui
Author_Institution
Center for Information and Neural Networks, National Institute of Information and Communications Technology (NICT), and Osaka University, Japan
fYear
2014
fDate
7/1/2014 12:00:00 AM
Firstpage
1
Lastpage
3
Abstract
Computing-in-Memory has recently attracted increasing interest because of the expected limitations to be faced by the traditional von Neumann architecture under further extensions of Moore´s law. Cellular architectures are especially well positioned as candidates in this context. The most well-known among these are Cellular Automata (CA), which are computing devices with a regular structure of cells that are locally interconnected to each other. Their regularity facilitates manufacturing methods, like Interference Lithography (IL), that can produce high-density patterns of extreme regularity. When this technology is combined with bottom-up methods based on self-assembly, architectures become possible with extremely high numbers of identical cells that can be configured to conduct a wide variety of functions. This paper gives a focused introduction to cellular designs over the last 50 years and discusses their suitability for nanoelectronic implementations.
Keywords
"Computer architecture","Automata","Context","Lithography","Wires","Logic arrays"
Publisher
ieee
Conference_Titel
Nanoelectronics Conference (INEC), 2014 IEEE International
Electronic_ISBN
2159-3531
Type
conf
DOI
10.1109/INEC.2014.7460451
Filename
7460451
Link To Document