Title :
Design and demonstration of a configurable architecture for smart pixel research
Author :
Mal, Prosenjit ; Cantin, Jason F. ; Beyette, Fred R., Jr.
Author_Institution :
Dept. of ECECS, Cincinnati Univ., OH, USA
Abstract :
The design, demonstration and evaluation of a general purpose, smart pixel based photonic information processing system is presented. Based on a photonic VLSI device technology implemented in 1.5 μm CMOS, each pixel incorporates a photoreceiver with a RISC processor and produces a device that is suitable for prototyping photonic information processing systems
Keywords :
CMOS integrated circuits; VLSI; integrated optoelectronics; microprocessor chips; mixed analogue-digital integrated circuits; optical computing; reconfigurable architectures; reduced instruction set computing; smart pixels; 1.5 micron; CASPR architecture; CMOS process; RISC microprocessor; configurable architecture; optical photoreceiver circuit; optoelectronic devices; page-oriented optical data; photonic VLSI device technology; photonic information processing system; photoreceiver; smart pixel based system; CMOS logic circuits; CMOS process; CMOS technology; Design optimization; Information processing; Photonics; Prototypes; Smart pixels; Testing; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on
Conference_Location :
Dayton, OH
Print_ISBN :
0-7803-7150-X
DOI :
10.1109/MWSCAS.2001.986198
