DocumentCode
3774584
Title
Foundry TSV enablement for 2.5D/3D chip stacking
Author
Remi Yu
fYear
2012
Firstpage
1
Lastpage
31
Abstract
This article consists of a collection of slides from the author´s conference presentation on foundry TSV enablement for 2D/3D chip stacking. Some of the specific topics discussed include: logic design and networking infrustructures; memory stacking; examples of applications supported by this stacking methods; cost benefit analysis of three-dimensional integrated circuit investments; processing technologies; CMOS impact and evaluation; ecosystem work flows; and product reliability.
Keywords
"Stacking","Field programmable gate arrays","Ecosystems","Three-dimensional displays","Field programmable gate arrays","Product design","Mobile communication","System logic","Foundries"
Publisher
ieee
Conference_Titel
Hot Chips 24 Symposium (HCS), 2012 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2012.7476471
Filename
7476471
Link To Document