DocumentCode
3774605
Title
Floating point processing using FPGAs
Author
Michael Parker
Author_Institution
Altera Corp, United States
fYear
2012
Firstpage
1
Lastpage
31
Abstract
This article consists of a collection of slides from the author´s conference presentation on Altera´s Stratix V, floating point processing using field programmable gate array (FPGA) technology. Some of the specific topics discussed include: the Stratic V FPGA architecture and system specifications; approaches for fused data path processing; throughout capabilities comparing GFLOPS and GFLOPS/W; computational accurary and error analysis; and third party benchmarking techniques.
Keywords
"Field programmable gate arrays","Computer architecture","Throughput","Benchmark testing","Digital signal processing"
Publisher
ieee
Conference_Titel
Hot Chips 24 Symposium (HCS), 2012 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2012.7476493
Filename
7476493
Link To Document