DocumentCode :
3774629
Title :
CUDA parallel programming model
Author :
Michael Garland
Author_Institution :
NVIDIA Research, USA
fYear :
2008
Firstpage :
1
Lastpage :
29
Abstract :
Presents a collection of slides covering the following topics: parallel threads; parallel algorithms; heterogeneous systems; CPU; GPU; concurrent threads; shared memory model; vector addition kernel; block synchronization; thread block; per-block shared memory; parallel reduction; serial SAXPY routine; and parallel SAXPY routine.
Keywords :
"Instruction sets","Graphics processing units","Tutorials","Parallel programming","Kernel","Parallel algorithms","Synchronization"
Publisher :
ieee
Conference_Titel :
Hot Chips 20 Symposium (HCS), 2008 IEEE
Type :
conf
DOI :
10.1109/HOTCHIPS.2008.7476519
Filename :
7476519
Link To Document :
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