Title :
DAPDNA-2 a dynamically reconfigurable processor with 376 32-bit processing elements
Author_Institution :
IPFlex Inc., Japan
Abstract :
This article consists of a collection of slides from the author´s conference presentation on the special features, system design and architectures, processing capabilities, and targeted markets for IPFlex Inc.´s DAPDNA-2, a dynamically reconfigurable processor with 376 32-bit processing elements.
Keywords :
"Reduced instruction set computing","Program processors","Parallel processing","Random access memory","Bandwidth","Logic gates","Scalability"
Conference_Titel :
Hot Chips XVII Symposium (HCS), 2005 IEEE
DOI :
10.1109/HOTCHIPS.2005.7476596
